fix all leaks and incorrect parameter counts in amd64.e

this required adding a new magic-comment command, drop-subitem, because there's a couple cases, in indexed addressing mode helpers, where a hardcoded register value is used as part of preparing an sib word, and that value shouldn't become a subitem for the assembly word that calls the helper.

notably, a lot of the disp8 and indexed assembly words had incorrect parameter counts that needed adjusting

parameter ORDERS still need a close read to make sure they're correct.  also, as future work, substring entries should be renamed to subitem entries.

Force-Push: yes
Change-Id: I419243855751416377d0ea0c5062fa1ba9e62a8d

1 files changed, 20 insertions, 11 deletions

diff --git a/amd64.e b/amd64.e
index e647f9b..ba78bc4 100644
--- a/amd64.e
+++ b/amd64.e
@@ -496,7 +496,10 @@ s" :cc-greater" keyword
     reg64 0 3unroll modrm
     ~ (equality result, output point)
     ~ If the R/M register was rsp, we need an SIB byte; otherwise, skip it.
-    swap { 0 4 :rsp reg64 sib } if
+    swap {
+      0 4 :rsp reg64 sib
+      ~ : drop-subitem
+    } if
     exit
   } if
   ." R/M parameter to addressing-indirect-reg64 is :rbp." 1 sys-exit ;
@@ -511,7 +514,10 @@ s" :cc-greater" keyword
   4 unroll
   reg64 1 3unroll modrm
   ~ If the R/M register was rsp, we need an SIB byte; otherwise, skip it.
-  3roll { 0 4 :rsp reg64 sib } if
+  3roll {
+    0 4 :rsp reg64 sib
+    ~ : drop-subitem
+  } if
   ~ The displacement byte.
   swap
   ~ : 1 adjust-length
@@ -528,7 +534,10 @@ s" :cc-greater" keyword
   4 unroll
   reg64 2 3unroll modrm
   ~ If the R/M register was rsp, we need an SIB byte; otherwise, skip it.
-  3roll { 0 4 :rsp reg64 sib } if
+  3roll {
+    0 4 :rsp reg64 sib
+    ~ : drop-subitem
+  } if
   ~ The displacement value.
   swap
   ~ : 4 adjust-length
@@ -584,20 +593,20 @@ s" :cc-greater" keyword
 
 ~ (output point, source register -- output point)
 : push-reg64
-  ~ : 0 push-reg64
+  ~ : 0 # push-reg64
   reg64 0x50 opcodereg ;
 : push-extrareg64
-  ~ : 0 push-extrareg64
+  ~ : 0 # push-extrareg64
   swap rex-b swap extrareg64 0x50 opcodereg ;
   ~   Note the use of the B rex bit here; this instruction puts the register
   ~ number in the opcode field, so it uses Table 3-1.
 
 ~ (output point, target register -- output point)
 : pop-reg64
-  ~ : 1 pop-reg64
+  ~ : 1 # pop-reg64
   reg64 0x58 opcodereg ;
 : pop-extrareg64
-  ~ : 2 pop-extrareg64
+  ~ : 2 # pop-extrareg64
   swap rex-b swap extrareg64 0x58 opcodereg ;
   ~   Note the use of the B rex bit here; this instruction puts the register
   ~ number in the opcode field, so it uses Table 3-1.
@@ -627,7 +636,7 @@ s" :cc-greater" keyword
 ~  source base register, source index register, source index scale factor,
 ~  target register -- output point)
 : lea-reg64-indexed-reg64
-  ~ : 1 # # # lea-reg64-indexed-reg64
+  ~ : 1 # # # # lea-reg64-indexed-reg64
   5 roll rex-w 0x8D pack8 5 unroll
   reg64 4 unroll 3unroll swap addressing-indexed-reg64 ;
 
@@ -636,7 +645,7 @@ s" :cc-greater" keyword
 ~  source displacement value,
 ~  target register -- output point)
 : lea-reg64-disp8-indexed-reg64
-  ~ : 1 # # # # lea-reg64-disp8-indexed-reg64
+  ~ : 1 # # # # # lea-reg64-disp8-indexed-reg64
   6 roll rex-w 0x8D pack8 6 unroll
   reg64 5 unroll 3 roll 4 roll 3 roll addressing-disp8-indexed-reg64 ;
 
@@ -714,7 +723,7 @@ s" :cc-greater" keyword
 ~  source base register, source index register, source index scale factor,
 ~  target register -- output point)
 : mov-reg64-indexed-reg64
-  ~ : 1 # # # mov-reg64-indexed-reg64
+  ~ : 1 # # # # mov-reg64-indexed-reg64
   5 roll rex-w 0x8B pack8 5 unroll
   reg64 4 unroll 3unroll swap addressing-indexed-reg64 ;
 
@@ -722,7 +731,7 @@ s" :cc-greater" keyword
 ~  target base register, target index register, target index scale factor
 ~  -- output point)
 : mov-indexed-reg64-reg64
-  ~ : 1 # # # mov-indexed-reg64-reg64
+  ~ : 1 # # # # mov-indexed-reg64-reg64
   5 roll rex-w 0x89 pack8 5 unroll
   4 roll reg64 4 unroll
   3unroll swap addressing-indexed-reg64 ;